Capacitance-voltage (C-V) testing is widely used to determine semiconductor parameters, particularly in MOSCAP and mosfets structures. However, other types of semiconductor devices and technologies can also be characterized with C-V measurements, including bipolar junction transistors (BJTs), JFETs, III-V compound devices, photovoltaic cells, MEMs devices, organic TFT displays, photodiodes, carbon nanotubes (CNTs), and many others.
The fundamental nature of these measurements makes them useful in a wide range of applications and disciplines. They are used in the research labs of universities and semiconductor manufacturers to evaluate new materials, processes, devices, and circuits. C-V measurements are extremely important to product and yield enhancement engineers, who are responsible for improving processes and device performance. Reliability engineers use these measurements to qualify material suppliers, monitor process parameters, and analyze failure mechanisms.
With appropriate methodologies, instrumentation, and software, a multitude of semiconductor device and material parameters can be derived. This information is used all along the production chain beginning with evaluation of epitaxially grown crystals, including parameters such as average doping concentration, doping profiles, and carrier lifetimes. In wafer processes, C-V measurements can reveal oxide thickness, oxide charges, mobile ions (contamination), and interface trap density. These measurements continue to be used after other process steps, such as lithography, etching, cleaning, dielectric and polysilicon depositions, and metallization. After devices are fully fabricated on the wafer, C-V is used to characterize threshold voltages and other parameters during reliability and basic device testing and to model the performance of these devices.
The instrumentation software should include ready-to-run test routines that do not require user programming. These should be available for the most widely used device technologies and test regimens, which were mentioned in the first three paragraphs of this article. Some researchers may also be interested in less common tests, such as performing both a C V and C f sweep on a Metal Insulator Metal (MIM) capacitor, measuring small interconnect capacitance on a wafer, or doing a C V sweep on a two-terminal nanowire device. The parameter extractions should be easily obtained, with automated curve plotting.
Often, engineers and researchers are expected to perform C-V measurements with little experience and training on the instrumentation. A mosfets with an intuitive user interface and easy-to-use features makes this practical. That includes simple test setup, sequence control, and data analysis. Otherwise, the user spends more time learning the system than collecting and using the data.